Summary: Marvell is seeking an analog mixed-signal design intern for its Central Engineering Team to support analog IP development through design, layout, silicon evaluation, and characterization. Highlights: 1. Support IC design through design, layout, evaluation, and characterization. 2. Gain experience in SPICE simulations, EMIR analysis, and co-simulation. 3. Work with high-speed analog IC design and flow development. About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Central Engineering Team is seeking an analog mixed signal design intern to support the development of analog IP products at Córdoba (Argentina) design center. Job responsibilities include support of IC design through design and layout, silicon evaluation and characterization. The successful candidate will be self\-motivated, willing to learn exciting new technologies and be able to work effectively within a talented group of individuals. What You Can Expect The interns will gain experience in the following topics:* Join the design team and own a piece of the design. * Verify analog IC design using SPICE simulations. * Run Electromigration/IR drop (EMIR) analysis on analog IC layout. * Run co\-simulation between digital and analog designs. * Run Static Timing Analysis (STA) on high\-speed analog IC design. * Develop and enhance flows that support and facilitate robust analog IC design. What We're Looking For Students have to be in last year of a 5/5\.5 year Engineer course at UTN\-FRC/UTN\-VM/UNC/IUA or doing Master/PhD in Electrical Engineer at any university of Argentina. Desired skills are: * Intuitive and analytical understanding of transistor level and CMOS circuit design * Experience in Cadence schematics capture, simulation and layout * Ability to define and adhere to project schedules * Ability to have effective written and verbal communication skills * Ability to write behavioral models for both and analog and digital circuits is a plus Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real\-time answer generators like ChatGPT or Copilot, or automated note\-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export\-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3\), all applicants may be subject to an export license review process prior to employment. \#LI\-MFBJ